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PIC18F1230/1330

DS39758D-page 162

2009 Microchip Technology Inc.

15.2.4.1

Special Considerations Using

Auto-Wake-up

Since auto-wake-up functions by sensing rising edge

transitions on RX/DT, information with any state changes

before the Stop bit may signal a false End-of-Character

and cause data or framing errors. To work properly,

therefore, the initial characters in the transmission must

be all ‘0’s. This can be 00h (8 bits) for standard RS-232

devices or 000h (12 bits) for LIN/J2602 bus.

Oscillator start-up time must also be considered,

especially in applications using oscillators with longer

start-up intervals (i.e., XT or HS mode). The Sync

Break (or Wake-up Signal) character must be of

sufficient length and be followed by a sufficient interval

to allow enough time for the selected oscillator to start

and provide proper initialization of the EUSART.

15.2.4.2

Special Considerations Using

the WUE Bit

The timing of WUE and RCIF events may cause some

confusion when it comes to determining the validity of

received data. As noted, setting the WUE bit places the

EUSART in an Idle mode. The wake-up event causes a

receive interrupt by setting the RCIF bit. The WUE bit is

cleared after this when a rising edge is seen on RX/DT.

The interrupt condition is then cleared by reading the

RCREG register. Ordinarily, the data in RCREG will be

dummy data and should be discarded.

The fact that the WUE bit has been cleared (or is still

set) and the RCIF flag is set should not be used as an

indicator of the integrity of the data in RCREG. Users

should consider implementing a parallel method in

firmware to verify received data integrity.

To assure that no actual data is lost, check the RCIDL

bit to verify that a receive operation is not in process. If

a receive operation is not occurring, the WUE bit may

then be set just prior to entering the Sleep mode.

FIGURE 15-8:

AUTO-WAKE-UP BIT (WUE) TIMINGS DURING NORMAL OPERATION

FIGURE 15-9:

AUTO-WAKE-UP BIT (WUE) TIMINGS DURING SLEEP

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

OSC1

WUE bit(1)

RX/DT Line

RCIF

Note 1:

The EUSART remains in Idle while the WUE bit is set.

Bit Set by User

Cleared Due to User Read of RCREG

Auto-Cleared

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

OSC1

WUE bit(2)

RX/DT Line

RCIF

Cleared Due to User Read of RCREG

Sleep Command Executed

Note 1:

If the wake-up event requires long oscillator warm-up time, the auto-clear of the WUE bit can occur before the oscillator is ready. This

sequence should not depend on the presence of Q clocks.

The EUSART remains in Idle while the WUE bit is set.

Sleep Ends

Note 1

Auto-Cleared

Bit Set by User

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